


                  ##################################################
                  ##                                              ##
                  ##         C A L I B R E    S Y S T E M         ##
                  ##                                              ##
                  ##             L V S   R E P O R T              ##
                  ##                                              ##
                  ##################################################



REPORT FILE NAME:         SRAM8192Cells.lvs.report
LAYOUT NAME:              /homenfs/platou/jhp8b/cadence/SRAM8192Cells.sp ('SRAM8192Cells')
SOURCE NAME:              /homenfs/platou/jhp8b/cadence/SRAM8192Cells.src.net ('SRAM8192Cells')
RULE FILE:                /homenfs/platou/jhp8b/cadence/_calibreLVS.rul_
RULE FILE TITLE:          LVS Rule File for FreePDK45
CREATION TIME:            Sun Dec 12 00:54:22 2010
CURRENT DIRECTORY:        /net/plato.ee.virginia.edu/users/jhp8b/cadence
USER NAME:                jhp8b
CALIBRE VERSION:          v2009.1_17.14    Mon Feb 16 12:59:40 PST 2009



                               OVERALL COMPARISON RESULTS



                         #       ###################       _   _   
                        #        #                 #       *   *   
                   #   #         #     CORRECT     #         |     
                    # #          #                 #       \___/  
                     #           ###################               




**************************************************************************************************************
                                      CELL  SUMMARY
**************************************************************************************************************

  Result         Layout                        Source
  -----------    -----------                   --------------
  CORRECT        SRAM8192Cells                 SRAM8192Cells



**************************************************************************************************************
                                      LVS PARAMETERS
**************************************************************************************************************


o LVS Setup:

   LVS COMPONENT TYPE PROPERTY            element
   LVS COMPONENT SUBTYPE PROPERTY         model
   // LVS PIN NAME PROPERTY
   LVS POWER NAME                         "VDD"
   LVS GROUND NAME                        "VSS" "GROUND"
   LVS CELL SUPPLY                        NO
   LVS RECOGNIZE GATES                    ALL
   LVS IGNORE PORTS                       NO
   LVS CHECK PORT NAMES                   NO
   LVS IGNORE TRIVIAL NAMED PORTS         NO
   LVS BUILTIN DEVICE PIN SWAP            YES
   LVS ALL CAPACITOR PINS SWAPPABLE       NO
   LVS DISCARD PINS BY DEVICE             NO
   LVS SOFT SUBSTRATE PINS                NO
   LVS INJECT LOGIC                       YES
   LVS EXPAND UNBALANCED CELLS            YES
   LVS EXPAND SEED PROMOTIONS             NO
   LVS PRESERVE PARAMETERIZED CELLS       NO
   LVS GLOBALS ARE PORTS                  YES
   LVS REVERSE WL                         NO
   LVS SPICE PREFER PINS                  NO
   LVS SPICE SLASH IS SPACE               YES
   LVS SPICE ALLOW FLOATING PINS          YES
   // LVS SPICE ALLOW INLINE PARAMETERS     
   LVS SPICE ALLOW UNQUOTED STRINGS       NO
   LVS SPICE CONDITIONAL LDD              NO
   LVS SPICE CULL PRIMITIVE SUBCIRCUITS   NO
   LVS SPICE IMPLIED MOS AREA             NO
   // LVS SPICE MULTIPLIER NAME
   LVS SPICE OVERRIDE GLOBALS             NO
   LVS SPICE REDEFINE PARAM               NO
   LVS SPICE REPLICATE DEVICES            NO
   LVS SPICE SCALE X PARAMETERS           NO
   LVS SPICE STRICT WL                    NO
   // LVS SPICE OPTION
   LVS STRICT SUBTYPES                    NO
   LVS EXACT SUBTYPES                     NO
   LAYOUT CASE                            NO
   SOURCE CASE                            NO
   LVS COMPARE CASE                       NO
   LVS DOWNCASE DEVICE                    NO
   LVS REPORT MAXIMUM                     50
   LVS PROPERTY RESOLUTION MAXIMUM        32
   // LVS SIGNATURE MAXIMUM
   // LVS FILTER UNUSED OPTION
   // LVS REPORT OPTION
   LVS REPORT UNITS                       YES
   // LVS NON USER NAME PORT
   // LVS NON USER NAME NET
   // LVS NON USER NAME INSTANCE

   // Reduction

   LVS REDUCE SERIES MOS                  YES
   LVS REDUCE PARALLEL MOS                YES
   LVS REDUCE SEMI SERIES MOS             YES
   LVS REDUCE SPLIT GATES                 YES
   LVS REDUCE PARALLEL BIPOLAR            YES
   LVS REDUCE SERIES CAPACITORS           YES
   LVS REDUCE PARALLEL CAPACITORS         YES
   LVS REDUCE SERIES RESISTORS            YES
   LVS REDUCE PARALLEL RESISTORS          YES
   LVS REDUCE PARALLEL DIODES             YES
   LVS REDUCTION PRIORITY                 PARALLEL

   // Trace Property

   TRACE PROPERTY  mn(nmos_vtl)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mn(nmos_vtl)  w w 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_vtl)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_vtl)  w w 4e-09 ABSOLUTE
   TRACE PROPERTY  mn(nmos_vth)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mn(nmos_vth)  w w 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_vth)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_vth)  w w 4e-09 ABSOLUTE
   TRACE PROPERTY  mn(nmos_vtg)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mn(nmos_vtg)  w w 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_vtg)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_vtg)  w w 4e-09 ABSOLUTE
   TRACE PROPERTY  mn(nmos_thkox)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mn(nmos_thkox)  w w 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_thkox)  l l 4e-09 ABSOLUTE
   TRACE PROPERTY  mp(pmos_thkox)  w w 4e-09 ABSOLUTE



                   CELL COMPARISON RESULTS ( TOP LEVEL )



                         #       ###################       _   _   
                        #        #                 #       *   *   
                   #   #         #     CORRECT     #         |     
                    # #          #                 #       \___/  
                     #           ###################               



LAYOUT CELL NAME:         SRAM8192Cells
SOURCE CELL NAME:         SRAM8192Cells

--------------------------------------------------------------------------------------------------------------

INITIAL NUMBERS OF OBJECTS
--------------------------

                Layout    Source         Component Type
                ------    ------         --------------
 Ports:            258       258

 Nets:           16642     16642

 Instances:      32768     32768         MN (4 pins)
                 16384     16384         MP (4 pins)
                ------    ------
 Total Inst:     49152     49152


NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------

                Layout    Source         Component Type
                ------    ------         --------------
 Ports:            258       258

 Nets:             258       258

 Instances:         64        64         _bitrow128v (132 pins)
                ------    ------
 Total Inst:        64        64



**************************************************************************************************************
                               INFORMATION AND WARNINGS
**************************************************************************************************************


                  Matched    Matched    Unmatched    Unmatched    Component
                   Layout     Source       Layout       Source    Type
                  -------    -------    ---------    ---------    ---------
   Ports:             258        258            0            0

   Nets:              258        258            0            0

   Instances:          64         64            0            0    _bitrow128v
                  -------    -------    ---------    ---------
   Total Inst:         64         64            0            0


o Initial Correspondence Points:

   Ports:        VDD VSS WL7 WL13 WL35 WL12 WL14 WL15 WL18 WL26 WL29 WL32 WL34 WL38 WL40 WL42
                 WL45 WL67 WL68 WL85 WL109 WL114 WL1 WL4 WL6 WL9 WL10 WL11 WL16 WL17 WL19 WL21
                 WL23 WL24 WL25 WL27 WL28 WL30 WL33 WL36 WL37 WL41 WL44 WL46 WL48 WL49 WL54 WL56
                 WL64 WL66


**************************************************************************************************************
                                         SUMMARY
**************************************************************************************************************

Total CPU Time:      1 sec
Total Elapsed Time:  1 sec
